US patent application No 2002/0048325 describes a channel selection circuit with a digital down converter. Down conversion, which is also known from analog channel selection circuits, involves multiplying an input signal with a local oscillator signal and filtering the intermediate frequency signals. US patent application No 2002/0048325 describes a digital from of this process wherein a digitized signal is down-converted by digitally multiplying it with quadrature components of a digital local oscillator signal. The real and imaginary parts of the down-converted signals are passed through digital filters with the same low pass filter response. The document notes that this type of digital process suffers from spurious signals, due to rounding errors in the digital local oscillator signal.
As a solution, the document proposes to use an additional down conversion stage inserted in front of the mixer. The additional down conversion stage mixes down to an intermediate frequency (IF) and uses band-pass filters to filter the real and imaginary parts of the down-converted signal at the intermediate frequency. The additional down conversion stage uses local oscillator signals only at frequencies where minimum rounding errors occur.
For this purpose the document notes that the local oscillator signals are generated by computing progressive phase values and using the phase values to look up sine and cosine values in a look-up memory. The allowable frequencies for mixing to the IF band are selected so that the step size of the progressive phase values is a multiple of the phase step between sine and cosine values in the look-up memory. This reduces rounding errors, but it makes it impossible to tune the local oscillator to arbitrary channel frequencies. Accurate tuning is realized with the local oscillator of the final mixer after the down conversion stage. The local oscillator signal of this mixer may also be used to set the band position of the band pass filter of the down conversion stage. This approach reduces power consumption, because the circuit behind the bandpass filter is operated at a sub-sample frequency.
It is desirable to perform digital signal processing at very high sample rates. For example to replace analog signal processing performed by radio frequency receivers, such as television receivers, it would be desirable to perform digital processing at a sampling rate that captures the entire transmission band that contains all receivable channels. However, this could mean that sampling frequencies of 109 samples per second and up may be needed.
The sample rate that can be handled by digital signal processing is limited by the ability of digital signal processing circuits to perform the required operations. At low sample rate a single programmable signal processor may be used to perform different parts of the processing operation in time multiplexed way. However, in this way the maximum sample rate is increasingly limited as the processing operation becomes more complex. Maximum sample rate may be realized by using different components in parallel to perform respective parts of the processing operation. Unfortunately, use of parallel components drives up circuit cost. Moreover digital signal processing circuits that are able to perform such processing tend to consume a lot of power.